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oscillograph_AVR
- 通过这个示波器的制作，你将会了解很多东西，比如如何运用运算放大器组合放大电路，高速AD转换器的应用、FIFO存储器的应用、AVR单片机SPI总线接口协议以及点阵液晶驱动。-Produced by the oscilloscope, you will understand many things, such as how to use the combination of amplifier op-amp, high-speed AD converter application, FIFO mem
AVD
- 现代的IC芯片包含丰富的触发器，不同电路的时钟驱动源存在频率和相位的差异，因而出现了跨不同时钟区域进行异步数据传输的要求。亚稳态问题是异步数据传输过程面临的主要问题，本文提出多种跨越异步时钟边界传输数据的方法，它们包括FIFO法和脉冲展宽处理等同步方法。 -Modern IC chip contains a wealth of trigger, the clock drive source different circuit exists between the frequency and ph
foio
- verilog语言写的先进先出（FIFO）电路-verilog language written in FIFO (FIFO) circuit
fifo_verilog
- 16位FIFO的硬件电路，使用verilog实现。文件内含组合逻辑和寄存逻辑两种方法的实现，以及对应的testbench测试代码-16 FIFO hardware circuits using verilog implementation. File contains a combination of logic and storage logic to achieve the two methods, and the corresponding testbench test code
async_fifo_prj
- Verilog语言写的异步fifo，包含随机数产生电路和testbentch,直接可用于实际工程中。代码为华为内部代码。相信你会喜欢。-Verilog language used to write asynchronous fifo, including random number generation circuit and testbentch, can be used directly in the actual project. Code for Huawei internal code
fifoas
- 异步时序的FIFO，实现了异步逻辑的电路，可综合，通过了验证-Asynchronous timing FIFO, implement asynchronous logic circuits can be integrated through the verification
VerilogBasicICDesign
- Verilog基本电路设计,包括时钟域同步、无缝切换、 异步FIFO、去抖滤波-Verilog basic circuit design, including clock domain synchronization, seamless switching, asynchronous FIFO, debounce filter